1. Field of the Invention
The present invention relates to a wafer cassette for processing of silicon wafers utilized in integrated circuits, and more particularly, pertains to a wafer cassette for carrying a plurality of silicon wafers for integrated circuit processing in known processes including on-center, centrifugal, bath emersion, and in-line one-wafer-at-a-time processing.
2. Description of the Prior Art
The prior art wafer cassettes have been heavy, bulky and expensive, and containing specific structural material not providing for open area for processing of the wafers. The prior art cassettes block spray patterns and processing liquids, and also are of light structural strength such that the prior art cassettes would break during the processing, destroying the silicon wafers. The profiles of the prior art wafer cassettes were high and were of considerable weight, and lacked the structural integrity required for high yield of integrated circuits in automated integrated circuit processing equipment.
The present invention overcomes the disadvantages of the prior art by providing a wafer processing cassette for processing of silicon wafers or the like which includes an H-bar end, a low profile of structure providing for maximum open surface area and perimeter when spraying, open areas between each of the dividers, and provides for on-center processing of integrated circuit wafers in automated integrated circuit processing equipment. The present invention provides a wafer processing cassette for all avenues of processing. The wafer processing cassette is made from Teflon which withstands chemical etching process in addition to being accepted by wafer automated machines.